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PCD5096 Datasheet(PDF) 18 Page - NXP Semiconductors

No. de pieza PCD5096
Descripción Electrónicos  Universal codec
PDF  52 Pages
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Fabricante Electrónico  PHILIPS [NXP Semiconductors]
Página de inicio  http://www.nxp.com
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PCD5096 Datasheet(HTML) 18 Page - NXP Semiconductors

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1997 Jan 22
18
Philips Semiconductors
Preliminary specification
Universal codec
PCD5096
8.3.6
CONTROL REGISTER 4 (CR4)
CR4 is used to select the DSP modes. For further information see the
“PCD5096 DSP user manual”. Its state after reset
is 0000H.
Table 19 Control Register 4 (address 7CH)
Table 20 Description of CR4 bits
Table 21 Selection of the connection mode for channels LLb and LLa
Table 22 Selection of the operation mode
15
14
13
12
11
10
9
8
765432
1
0
−−−−−−−−
LLb2
LLb1
LLb0
LLa2
LLa1
LLa0
OPM1
OPM0
BIT
SYMBOL
DESCRIPTION
15 to 8
−
These 8 bits are not used.
7
LLb2
These 3 bits select the connection mode for channel LLb; see Table 21.
6
LLb1
5
LLb0
4
LLa2
These 3 bits select the connection mode for channel LLa; see Table 21.
3
LLa1
2
LLa0
1
OPM1
These 2 bits select the operation mode, see Table 22.
0
OPM0
LLb2
LLb1
LLb0
CONNECTION MODES
LLa2
LLa1
LLa0
0
0
0
Idle mode with reset of LEC coefficients
0
0
1
Idle mode without reset of LEC coefficients
0
1
0
speech and tone
0
1
1
tone generation
1
0
0
dial tone detection
1
0
1
not allowed
1
1
0
not allowed
1
1
1
not allowed
OPM1
OPM0
OPERATION MODE
0
0
connection mode
0
1
read/write RAM mode
1
0
software reset
1
1
not allowed



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