PCD3310AP datasheet(10/28 Pages) PHILIPS

10 / 28 page

1996 Nov 21

Philips Semiconductors

Product speciﬁcation

Pulse and DTMF diallers with redial

PCD3310; PCD3310A

Table 3

Frequency tolerance of the output tones for DTMF signalling; fxtal = 3.579545 MHz

ROW/COLUMN

STANDARD

FREQUENCY (Hz)

TONE OUTPUT

FREQUENCY (Hz)

FREQUENCY DEVIATION

%Hz

ROW 1

697

697.90

+0.13

+0.90

ROW 2

770

770.46

+0.06

+0.46

ROW 3

852

850.45

−0.18

−1.55

ROW 4

941

943.23

+0.24

+2.23

COL 1

1209

1206.45

−0.21

−2.55

COL 2

1336

1341.66

+0.42

+5.66

COL 3

1477

1482.21

+0.35

+5.21

COL 4

1633

1638.24

+0.32

+5.25

7.8

Dial pulse and Flash output (DP/FLO)

This is a combined output which provides control signals

for timing in pulse dialling or for a calibrated line break

(flash or register recall) in both dialling modes.

7.9

Mute output (M1)

The MUTE output can be used to disable the microphone

during dialling.

During pulse dialling the mute output becomes active

HIGH for the period of the inter-digit pause, break time and

make time. It remains at this level until the last digit is

pulsed out.

During DTMF dialling the mute output becomes active

HIGH for the period of tone transmission and remains at

this level until the end of hold-over time. It is also active

HIGH during flash and flash hold-over time.

7.10

Mute output (M1)

Inverted output of M1. In the PCD3310P it is only available

as a bonding option of M1.

7.11

Muting output (M2)

Active HIGH output during actual dialling; i.e. during break

or make time in pulse dialling, or during tone ON/OFF in

DTMF dialling. It is an open drain p-channel output.

DIALLING PROCEDURES (see Figs 7, 8 and 9)

8.1

Dialling

After CE has risen to VDD the oscillator starts running and

the Read Address Counter (RAC) is set to the first address

of both the main and temporary redial registers, ready to

redial any stored number (see Fig.6). By dialling the first

valid digit, the Temporary Write Address Counter (TWAC)

will be set to the first address of the temporary register,

and the decoded digit will be stored in the temporary

the next address. The first 5 valid digits will be decoded

and stored in the temporary register in this way, and have

no effect on the main register and its associated Write

Address Counter (WAC). After the sixth valid digit is

entered, the TWAC indicates an overflow condition.

The data from the temporary register will be copied into the

5 least significant places of the main register and the

TWAC into the WAC. The sixth digit, and all subsequent

digits will be stored in the main register (a total of not more

than 23). If more than 23 digits are entered redial will be

inhibited. If not more than 5 digits are entered only the

temporary register and the associated TWAC are affected.

All entries are debounced on both the leading and trailing

edges for at least time period te as shown in Figs 11, 12,

13 and 14.

Each entry is tested for validity before being stored in the

redial registers.

• For DTMF dialling all dial keys are valid

• For pulse dialling only numeric dial keys are valid.

Simultaneous to their acceptance and corresponding to

the selected mode (pulse, DTMF or mixed), the entries are

transmitted as pulse-trains or as DTMF frequencies in

accordance with PTT requirements. Non-numeric dial key

entries are neglected during pulse dialling; they are neither

stored nor transmitted.

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