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SZA-3044 Datasheet(PDF) 2 Page - SIRENZA MICRODEVICES |
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SZA-3044 Datasheet(HTML) 2 Page - SIRENZA MICRODEVICES |
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2 / 8 page ![]() 303 South Technology Court Broomfield, CO 80021 Phone: (800) SMI-MMIC http://www.sirenza.com 2 EDS-103989 Rev E SZA-3044 2.7-3.8 GHz 5V Power Amp Pin Out Description Pin # Function Description 1,2,4,5,7, 9,11,13,1 5,17,19 N/C These are unused pins and not wired inside the package. They may be grounded or connected to adjacent pins. 6VPC1 VPC1 is the bias control pin for the stage 1 active bias circuit. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA. 8VPC2 VPC2 is the bias control pin for the stage 2 active bias circuit. An external series resistor is required for proper setting of bias levels. Refer to the evaluation board schematic for resistor value. To prevent potential damage, do not apply voltage to this pin that is +1V greater than voltage applied to pin 20 (Vbias) unless Vpc supply current capability is less than 10 mA. 10 Vdet Output power detector voltage. Load with > 10K ohms for best performance 3 RFIN RF input pin. This is DC grounded internal to the IC. Do not apply voltage to this pin. 12,14 RFOUT RF output pin. This is also another connection to the 2nd stage collector. 16 VC2 2nd stage collector bias pin. Apply 3.0 to 5.0V to this pin. 18 VC1 1st stage collector bias pin. Apply 3.0 to 5.0V to this pin. 20 Vbias Active bias network VCC. Apply 3.0 to 5.0V to this pin. EPAD Gnd Exposed area on the bottom side of the package needs to be soldered to the ground plane of the board for opti- mum thermal and RF performance. Several vias should be located under the EPAD as shown in the recom- mended land pattern (page 5). Caution: ESD Sensitive Appropriate precaution in handling, packaging and testing devices must be observed. Absolute Maximum Ratings Parameters Value Unit VC2 Collector Bias Current (IVC2) 600 mA VC1 Collector Bias Current (IVC1) 300 mA Device Voltage (VD)7.0 V Power Dissipation 3.5 W Operating Lead Temperature (TL)-40 to +85 ºC Max RF Input Power for 50 ohm output load 15 dBm Max RF Input Power for 10:1 VSWR RF out load 8dBm Storage Temperature Range -40 to +150 ºC Operating Junction Temperature (TJ) +150 ºC ESD Human Body Model 2000 V Operation of this device beyond any one of these limits may cause permanent damage. For reliable continuous operation the device voltage and current must not exceed the maximum operating values specified in the table on page one. Bias conditions should also satisfy the following expression: IDVD < (TJ - TL) / RTH’ j-l Simplified Device Schematic Stage 1 Bias Stage 2 Bias Pin 3 Pin 12, 14 Pin 20 Pin 6 Pin 18 Pin 8 Pin 16 Pin 10 EPAD EPAD |
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