LP8733 datasheet(40/86 Pages) TI

40 / 86 page

ACK from slave

START

MSB Chip Address LSB

SCL

ACK from slave

MSB Register Address LSB

MSB

Data

LSB

STOP

ACK from slave

NACK from master

REPEATED START

Data from slave

SDA

START

id = 0x60

W ACK

address = 0x3F

ACK

R ACK

address 0x3F data

NACK

STOP

MSB Chip Address LSB

id = 0x60

When READ function is to be accomplished, a WRITE function must precede the READ function as shown above.

Figure 7-20. Read Cycle (r = read; SDA = 1). Example Device Address = 0x60

7.5.1.4 I2C-Compatible Chip Address

After the START condition, the I2C master sends the 7-bit address followed by an eighth bit, read or write (R/W).

R/W = 0 indicates a WRITE and R/W = 1 indicates a READ. The second byte following the device address

selects the register address to which the data is written. The third byte contains the data for the selected register.

Bit 7

MSB

LSB

2C Slave Address (chip address)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

R/W

Bit 0

Here in an example with device address of 1100000Bin = 60Hex.

Figure 7-21. Device Address Example

7.5.1.5 Auto-Increment Feature

The auto-increment feature allows writing several consecutive registers within one transmission. Every time an

8-bit word is sent to the LP8733xx, the internal address index counter is incremented by one and the next

does not work for read.

Table 7-6. Auto-Increment Example

MASTER

ACTION

START

DEVICE

ADDRESS = X

WRITE

ADDRESS

DATA

STOP

LP8733xx

ACK

LP8733

SNVSBK2A – SEPTEMBER 2019 – REVISED JUNE 2021

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LP8733 Datasheet(PDF) 40 Page - Texas Instruments

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