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AT80C51RB2-SLSCM Datasheet(PDF) 45 Page - ATMEL Corporation |
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AT80C51RB2-SLSCM Datasheet(HTML) 45 Page - ATMEL Corporation |
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45 / 83 page ![]() 46 AT80C51RD2/AT83C51Rx2 4113B–8051–03/05 Interrupt System The T8xc51Rx2 have a total of 8 interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (timers 0, 1 and 2), the serial port interrupt, Keyboard inter- rupt and the PCA global interrupt. These interrupts are shown in Figure 19. Figure 19. Interrupt Control System Each of the interrupt sources can be individually enabled or disabled by setting or clear- ing a bit in the Interrupt Enable register (Table 36 and Table 34). This register also contains a global disable bit, which must be cleared to disable all interrupts at once. Each interrupt source also can be individually programmed to one out of four priority lev- els by setting or clearing a bit in the Interrupt Priority register (Table 37) and in the Interrupt Priority High register (Table 35 and Table 36) shows the bit values and priority levels associated with each combination. IE1 0 3 High Priority Interrupt Interrupt Polling Sequence, Decreasing from High to Low Priority Low Priority Interrupt Global Disable Individual Enable EXF2 TF2 TI RI TF0 INT0 INT1 TF1 IPH, IPL IE0 0 3 0 3 0 3 0 3 0 3 0 3 PCA IT KBD IT 0 3 |
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