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AT83SND1CXXX-ROTIL Datasheet(PDF) 163 Page - ATMEL Corporation |
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AT83SND1CXXX-ROTIL Datasheet(HTML) 163 Page - ATMEL Corporation |
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163 / 212 page ![]() 163 4109J–8051–10/06 AT8xC51SND1C Figure 19-4. Format and States in the Master Receiver Mode A Data 48h A SLA 08h MR MT Successful reception from a slave transmitter Next transfer started with a repeated start condition Not acknowledge received after the slave address Arbitration lost in slave address or data Byte Arbitration lost and addressed as slave Data A From master to slave From slave to master Any number of data Bytes and their associated acknowledge bits This number (contained in SSSTA) corresponds to a defined state of the TWI bus SR 40h A P 58h SLA SR W A P 10h 38h A continues Other master 38h A or A continues Other master 68h A continues Other master 78h B0h nnh To corresponding states in slave mode Data 50h |
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