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AT83SND1CXXX-ROTIL Datasheet(PDF) 162 Page - ATMEL Corporation |
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AT83SND1CXXX-ROTIL Datasheet(HTML) 162 Page - ATMEL Corporation |
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162 / 212 page ![]() 162 4109J–8051–10/06 AT8xC51SND1C Figure 19-3. Format and States in the Master Transmitter Mode Data 20h A SLA 08h MT MR Successful transmis- sion to a slave receiver Next transfer started with a repeated start condition Not acknowledge received after the slave address Arbitration lost in slave address or data Byte Arbitration lost and addressed as slave Not acknowledge received Data A From master to slave From slave to master Any number of data Bytes and their associated acknowledge bits This number (contained in SSSTA) corresponds to a defined state of the TWI bus SW 18h A P 28h SLA SW R A P 10h 30h A P 38h A or A continues Other master 38h A or A continues Other master 68h A continues Other master 78h B0h nnh after a data Byte To corresponding states in slave mode |
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