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WM8940 Datasheet(PDF) 29 Page - Wolfson Microelectronics plc |
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WM8940 Datasheet(HTML) 29 Page - Wolfson Microelectronics plc |
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29 / 85 page ![]() Pre-Production WM8940 w Pre-Production, Rev 3.0, February 2007 29 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 1010 or higher 23.2ms 186ms 1.34s R42 (2Ah) ALC Control 4 1 ALCZC 0 (zero cross off) ALC uses zero cross detection circuit. 0 = Disabled (recommended) 1 = Enabled Table 20 ALC Control Registers When the ALC is disabled, the input PGA remains at the last controlled value of the ALC. An input gain update must be made by writing to the INPPGAVOLL/R register bits. NORMAL MODE In normal mode, the ALC will attempt to maintain a constant signal level by increasing or decreasing the gain of the PGA. The following diagram shows an example of this. Figure 12 ALC Normal Mode Operation |
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