WM8711SEDSSLASHR datasheet(5/47 Pages) WOLFSON

5 / 47 page

Production Data

WM8711 / WM8711L

PD Rev 4.3 September 2006

PIN DESCRIPTION

28 LEAD

SSOP

28 LEAD

QFN

NAME

TYPE

DESCRIPTION

DBVDD

Supply

Digital Buffers VDD

CLKOUT

Digital Output

Buffered Clock Output

BCLK

Digital Input/Output

Digital Audio Bit Clock, Pull Down (see Note 1)

DACDAT

Digital Input

DAC Digital Audio Data Input

DACLRC

Digital Input/Output

DAC Sample Rate Left/Right Clock, Pull Down (see Note 1)

No Connection

HPVDD

Supply

Headphone VDD

LHPOUT

Analogue Output

Left Channel Headphone Output

RHPOUT

Analogue Output

Right Channel Headphone Output

HPGND

Ground

Headphone GND

LOUT

Analogue Output

Left Channel Line Output

ROUT

Analogue Output

Right Channel Line Output

AVDD

Supply

Analogue VDD

AGND

Ground

Analogue GND

VMID

Analogue Output

Mid-rail reference decoupling point

No Connection

RLINEIN

Analogue Input

Right Channel Line Input (AC coupled)

LLINEIN

Analogue Input

Left Channel Line Input (AC coupled)

MODE

Digital Input

Control Interface Selection, Pull up (see Note 1)

CSB

Digital Input

3-Wire MPU Chip Select/ 2-Wire MPU interface address

selection, active low, Pull up (see Note 1)

SDIN

Digital Input/Output

3-Wire MPU Data Input / 2-Wire MPU Data Input

SCLK

Digital Input

3-Wire MPU Clock Input / 2-Wire MPU Clock Input

XTI/MCLK

Digital Input

Crystal Input or Master Clock Input (MCLK)

XTO

Digital Output

Crystal Output

DCVDD

Supply

Digital Core VDD

DGND

Ground

Digital GND

Note:

Pull Up/Down only present when Control Register Interface ACTIVE=0 to conserve power.

It is recommended that the QFN ground paddle is connected to analogue ground on the application PCB.

WM8711SEDS/R Datasheet(PDF) 5 Page - Wolfson Microelectronics plc

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