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WM8216SEFL/R Datasheet(PDF) 17 Page - Wolfson Microelectronics plc |
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WM8216SEFL/R Datasheet(HTML) 17 Page - Wolfson Microelectronics plc |
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17 / 27 page  WM8216 Production Data w PD Rev 4.0 March 2007 17 Figure 13 ADC Input Black Level Adjust Settings OVERALL SIGNAL FLOW SUMMARY Figure 14 represents the processing of the video signal through the WM8216. Figure 14 Overall Signal Flow The INPUT SAMPLING BLOCK produces an effective input voltage V1. For CDS, this is the difference between the input video level VIN and the input reset level VRESET. For non-CDS this is the difference between the input video level VIN and the voltage on the VRLC/VBIAS pin, VVRLC, optionally set via the RLC DAC. The OFFSET DAC BLOCK then adds the amount of fine offset adjustment required to move the black level of the input signal towards 0V, producing V2. The PGA BLOCK then amplifies the white level of the input signal to maximise the ADC range, outputting voltage V3. |
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