ES9027SPRO datasheet(17/89 Pages) ESS

No. de pieza	ES9027SPRO

Descripción Electrónicos	32-bit High-Performance 8-Channel DAC

PDF	89 Pages

Scroll/Zoom	100%

Fabricante Electrónico	ESS [ESS Technology,Inc]

Página de inicio	http://www.esstech.com

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17 / 89 page

ES9027PRO Datasheet

VERSION 0.4.1

ESS TECHNOLOGY, INC. 109 Bonaventura Drive, San Jose, CA 95134, USA Tel (408) 643-8800 • WWW.ESSTECH.COM

DSD1

In DSD mode, there is a single DSD clock line, and each channel of data is an additional DSD data line. There is no internal channel

mapping for DSD input, DSD data input to DATA1 is sent to Ch1, DSD data input to DATA2 is sent to Ch2, etc. For 4 channel and 2

channel applications, the interpolation path data can be copied from DAC1+DAC2 to the other DAC pairs, see Register 0[6:3] for details.

Figure 9 – DSD format, 1bit stream

S/PDIF

S/PDIF is transmitted over a single signal line using dual phase encoded data, which allows for clock extraction from the data signal line.

In S/PDIF mode, there is only stereo data input. Channel 1 data will be sent to all odd channel DACs, Channel 2 data will be sent to all

even channel DACs.

The Automute Feature is not available when using DSD mode

ES9027SPRO Datasheet(PDF) 17 Page - ESS Technology,Inc