SC7283 datasheet(39/89 Pages) SITRONIX

No. de pieza	SC7283

Descripción Electrónicos	System-On-Chip Driver for 480RGBx272 TFT LCD

PDF	89 Pages

Scroll/Zoom	100%

Fabricante Electrónico	SITRONIX [Sitronix Technology Co., Ltd.]

Página de inicio	http://www.sitronix.com.tw

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39 / 89 page

SC7283

Version 1.0

Page 39 of 89

2018/11

7. COMMUNICATION INTERFACE

7.1 3-wire Serial Interface

a. Each serial command consists of 16 bits of data which is loaded one bit a time at the rising edge of serial

clock SCL.

b. Command loading operation starts from the falling edge of CS and is completed at the next rising edge of

CS.

c. The serial control block is operational after power on reset, but commands are established by the VSYNC

signal. If command is transferred multiple times for the same register, the last command before the VSYNC

signal is valid.

d. If less than 16 bits of SCL are input while CS is low, the transferred data is ignored.

e. If 16 bits or more of SCL are input while CS is low, the previous 16 bits of transferred data before then rising

edge of CS pulse are valid data.

f. Serial block operates with the SCL clock

g. Serial data can be accepted in the power save mode.

h. After power on reset or GRB reset, it is required 100ms delay to begin SPI communication.

SC7283 Datasheet(PDF) 39 Page - Sitronix Technology Co., Ltd.