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ADCMP606 Datasheet(PDF) 6 Page - Analog Devices

No. de pieza ADCMP606
Descripción Electrónicos  Rail-to-Rail, Very Fast, 2.5 V to 5.5 V, Single-Supply CML Comparators
PDF  16 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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ADCMP606 Datasheet(HTML) 6 Page - Analog Devices

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ADCMP606/ADCMP607
Preliminary Technical Data
Rev. PrA | Page 6 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
PIN 1
INDICATOR
1
VCCO
2
VCCI
3
VEE
9VEE
8LE/HYS
7SDN
TOP VIEW
(Not to Scale)
ADCMP607
Q 1
VEE 2
VP 3
Q
6
VCCI/VCCO
5
VN
4
ADCMP606
TOP VIEW
(Not to Scale)
Figure 3. ADCMP606 Pin Configuration
Figure 4. ADCMP607 Pin Configuration
Table 4. ADCMP606 (SC70-6) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater
than the analog voltage at the inverting input, VN.
2
VEE
Negative Supply Voltage.
3
VP
Noninverting Analog Input.
4
VN
Inverting Analog Input.
5
V /V
CCI
CCO
Input Section Supply/Output Section Supply. Shared pin.
6
Q
Inverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than
the analog voltage at the inverting input, VN.
Table 5. ADCMP607 (LSCFP-12) Pin Function Descriptions
Pin No.
Mnemonic
Description
1
V
Output Section Supply.
CCO
2
VCCI
Input Section Supply.
3
VEE
Negative Supply Voltage.
4
VP
Noninverting Analog Input.
5
VEE
Negative Supply Voltage.
6
VN
Inverting Analog Input.
7
SDN
Shutdown. Drive this pin low to shut down the device.
8
LE/HYS
Latch/Hysteresis Control. Bias with resistor or current for hysteresis adjustment; drive low to latch.
9
VEE
Negative Supply Voltage.
10
Q
Inverting Output. Q is at logic low if the analog voltage at the noninverting input, VP, is greater than the
analog voltage at the inverting input, VN, provided that the comparator is in compare mode.
11
VEE
Negative Supply Voltage.
12
Q
Noninverting Output. Q is at logic high if the analog voltage at the noninverting input, VP, is greater than
the analog voltage at the inverting input, VN, provided that the comparator is in compare mode.
V
Heat Sink
Paddle
The metallic back surface of the package is electrically connected to V
EE
EE
. It can be left floating because
Pin 3, Pin 5, Pin 9, and Pin 11 provide adequate electrical connection. It can also be soldered to the
application board if improved thermal and/or mechanical stability is desired.



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