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ADC0804S040 Datasheet(PDF) 2 Page - Renesas Technology Corp

No. de pieza ADC0804S040
Descripción Electrónicos  Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
PDF  18 Pages
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
Página de inicio  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

ADC0804S040 Datasheet(HTML) 2 Page - Renesas Technology Corp

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ADC0804S030_040_050_3
© IDT 2012. All rights reserved.
Product data sheet
Rev. 03 — 2 July 2012
2 of 18
Integrated Device Technology
ADC0804S030/040/050
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Cellular base stations
4. Quick reference data
Table 1.
Quick reference data
VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V;
VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 C to 70 C;
typical values measured at VCCA = VCCD = 5 V and VCCO = 3.3 V, Vi(a)(p-p) = 2.0 V; CL = 15 pF and
Tamb = 25 C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VCCA
analog supply voltage
4.75
5.0
5.25
V
VCCD
digital supply voltage
4.75
5.0
5.25
V
VCCO
output supply voltage
3.0
3.3
5.25
V
ICCA
analog supply current
-
18
24
mA
ICCD
digital supply current
-
16
21
mA
ICCO
output supply current
fclk = 40 MHz;
ramp input
-
1
2
mA
INL
integral non-linearity
fclk = 40 MHz
ramp input
-
0.2
0.5
LSB
DNL
differential non-linearity fclk = 40 MHz
ramp input
-
0.12
0.22
LSB
fclk(max)
maximum clock
frequency
ADC0804S030TS
30
-
-
MHz
ADC0804S040TS
40
-
-
MHz
ADC0804S050TS
50
-
-
MHz
Ptot
total power dissipation
fclk = 40 MHz;
ramp input
-
175
247
mW
5. Ordering information
Table 2.
Ordering information
Type number
Package
Sampling
frequency
(MHz)
Name
Description
Version
ADC0804S030TS
SSOP28
plastic shrink small outline package; 28 leads;
body width 5.3 mm
SOT341-1 30
ADC0804S040TS
SSOP28
plastic shrink small outline package; 28 leads;
body width 5.3 mm
SOT341-1 40
ADC0804S050TS
SSOP28
plastic shrink small outline package; 28 leads;
body width 5.3 mm
SOT341-1 50



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