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FXPS7115D4 Datasheet(PDF) 23 Page - NXP Semiconductors

No. de pieza FXPS7115D4
Descripción Electrónicos  Digital absolute pressure sensor, 40 kPa to 115 kPa
PDF  72 Pages
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Fabricante Electrónico  NXP [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo NXP - NXP Semiconductors

FXPS7115D4 Datasheet(HTML) 23 Page - NXP Semiconductors

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NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
7.5.3.4.1 Reserved command message format
MSB: bit 31; LSB: bit 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Command
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
8-bit CRC
0
0
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
0
0
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
0
1
0
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
0
1
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
1
0
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
1
1
1
0
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
Table 25. Reserved command message format
Bit field
Definition
C[3:0]
Reserved command
CRC[7:0]
8-bit CRC
Table 26. Reserved command message bit field descriptions
7.5.3.4.2 Reserved command response message format
MSB: bit 15; LSB: bit 0
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9
8
7
6
5
4
3
2
1
0
Command Echo
Data
8-bit CRC
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
x
CRC[7:0]
Table 27. Reserved command response message format
Bit field
Definition
Command echo
Reserved command echo. Undefined
Data
Response data. Undefined
CRC[7:0]
8-bit CRC
Table 28. Reserved command response message bit field descriptions
7.5.4 Error checking
7.5.4.1 Default 8-bit CRC
7.5.4.1.1 Command error checking
The device calculates an 8-bit CRC on the entire 32 bits of each command. Message data is entered into the
CRC calculator MSB first, consistent with the transmission order of the message. If the calculated CRC does
not match the transmitted CRC, the command is ignored and the device responds with the SPI error response.
The CRC decoding procedure is as follows:
1. A seed value is preset into the LSB of the shift register.
2. Using a serial CRC calculation method, the receiver rotates the received message and CRC into the LSB of
the shift register in the order received (MSB first).
FXPS7115D4
All information provided in this document is subject to legal disclaimers.
© 2023 NXP B.V. All rights reserved.
Product data sheet
Rev. 6.1 — 7 June 2023
23 / 72



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