ICS844246D Data Sheet

FEMTOCLOCK® CRYSTAL-TO-LVDS FREQUENCY SYNTHESIZER w/FANOUT BUFFER

ICS844246DG REVISION A OCTOBER 20, 2011

2

©2011 Integrated Device Technology, Inc.

Table 1. Pin Descriptions

NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.

Table 2. Pin Characteristics

Number

Name

Type

Description

1, 2

VDDO

Power

Output supply pins.

3, 4

nQ2, Q2

Output

Differential output pair. LVDS interface levels.

5, 6

nQ1, Q1

Output

Differential output pair. LVDS interface levels.

7, 8

nQ0, Q0

Output

Differential output pair. LVDS interface levels.

9

PLL_BYPASS

Input

Pullup

Selects between the PLL and crystal inputs as the input to the dividers.

When LOW, selects PLL. When HIGH, bypasses the PLL.

LVCMOS / LVTTL interface levels.

10

VDDA

Power

Analog supply pin.

11

VDD

Power

Core supply pin.

12

FB_SEL

Input

Pulldown

Feedback frequency select pin. LVCMOS/LVTTL interface levels.

13

14

XTAL_IN,

XTAL_OUT

Input

Crystal oscillator interface. XTAL_IN is the input. XTAL_OUT is the output.

15, 18

N_SEL0, N_SEL1

Input

Pullup

Output frequency select pin. LVCMOS/LVTTL interface levels.

16, 17

GND

Power

Power supply ground.

19, 20

nQ5, Q5

Output

Differential output pair. LVDS interface levels.

21, 22

nQ4, Q4

Output

Differential output pair. LVDS interface levels.

23, 24

nQ3, Q3

Output

Differential output pair. LVDS interface levels.

Symbol

Parameter

Test Conditions

Minimum

Typical

Maximum

Units

CIN

Input Capacitance

4pF

RPULLUP

Input Pullup Resistor

51

k

Ω

RPULLDOWN

Input Pulldown Resistor

51

k

Ω