AD7142 datasheet(39/68 Pages) AD

39 / 68 page

AD7142

Rev. 0 | Page 39 of 68

DETAILED REGISTER DESCRIPTIONS

BANK 1 REGISTERS

All addresses and default values are expressed in hexadecimal.

Table 19. PWR_CONTROL Register

Address

Data Bit

Default

Value

Type

Name

Description

0x000

[1:0]

R/W

POWER_MODE

Operating modes

00 = full power mode (normal operation, CDC

conversions approximately every 36 ms)

01 = full shutdown mode (no CDC conversions)

10 = low power mode (automatic wake up operation)

11 = full shutdown mode (no CDC conversions)

[3:2]

LP_CONV_DELAY

Low power mode conversion delay

00 = 200 ms

01 = 400 ms

10 = 600 ms

11 = 800 ms

[7:4]

SEQUENCE_STAGE_NUM

Number of stages in sequence (N + 1)

0000 = 1 conversion stage in sequence

0001 = 2 conversion stages in sequence

……

Maximum value = 1011 = 12 conversion stages per

sequence

[9:8]

DECIMATION

ADC decimation factor

00 = decimate by 256

01 = decimate by 128

10 = do not use this setting

11 = do not use this setting

[10]

SW_RESET

Software reset control (self-clearing)

1 = resets all registers to default values

[11]

INT_POL

Interrupt polarity control

0 = active low

1 = active high

[12]

EXCITATION_SOURCE

Excitation source control for Pin 15

0 = enable output

1 = disable output

[13]

SRC

Excitation source control for Pin 16

0 = enable output

1 = disable output

[15:14]

CDC_BIAS

CDC bias current control

00 = normal operation

01 = normal operation + 20%

10 = normal operation + 35%

11 = normal operation + 50%

AD7142 Datasheet(PDF) 39 Page - Analog Devices

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