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74LVC652D Datasheet(PDF) 9 Page - NXP Semiconductors |
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74LVC652D Datasheet(HTML) 9 Page - NXP Semiconductors |
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9 / 14 page ![]() Philips Semiconductors Product specification 74LVC652 Octal transceiver/register with dual enable (3-State) 1998 Jul 29 9 AC WAVEFORMS (Continued) VM = 1.5V at VCC w 2.7V VM = 0.5V * VCC at VCC t 2.7V VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V VX = VOL + 0.1VCC at VCC < 2.7V VY = VOH – 0.3V at VCC w 2.7V VY = VOH – 0.1VCC at VCC < 2.7V SV00774 V M S AB , S BA INPUT B n , A n OUTPUT V M t PLH t PHL GND V I V OL V OH Figure 3. Input SAB, SBA to output Bn, An propagation delay times. SV00775 outputs disabled outputs enabled outputs enabled tPHZ tPZH tPZL tPLZ VX VOL VCC VCC VI GND GND GND VY VOH VM VM VM VM OEBA INPUT OEAB INPUT OUTPUT HIGH–to–OFF OFF–to–HIGH OUTPUT LOW–to–OFF OFF–to–LOW Figure 4. OE inputs (OEAB, OEBA) to outputs An, Bn enable and disable times. TEST CIRCUIT PULSE GENERATOR VI RT D.U.T. VO CL 50pF S1 2 x VCC Open GND 500 Ω 500 Ω VCC VI t 2.7V VCC 2.7V – 3.6V 2.7V Test S1 GND tPLZ/tPZL 2 x VCC tPHZ/tPZH tPLH/tPHL Open SY00003 VCC Figure 5. Load circuitry for switching times. |
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