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HC705V8GRS/D Datasheet(PDF) 37 Page - NXP Semiconductors

No. de pieza HC705V8GRS/D
Descripción Electrónicos  The Motorola MC68HC705V8 microcontroller is a custom HC05 based MCU featuring a Message Data Link Controller (MDLC) module and on-chip power regulation.
PDF  172 Pages
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Fabricante Electrónico  NXP [NXP Semiconductors]
Página de inicio  http://www.nxp.com
Logo NXP - NXP Semiconductors

HC705V8GRS/D Datasheet(HTML) 37 Page - NXP Semiconductors

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SECTION 3: EPROM AND EEPROM
Page 26
MC68HC705V8 Specification Rev. 2.1
which will therefore represent the value transferred from the MOR at reset if it is left
unprogrammed.
.
Figure 3-3:
Option Register
REGEN - Regulator Enable or Disable
1 = internal voltage regulator is enabled.
0 = internal voltage regulator is disabled.
COPEN - COP Timer Enable or Disable
1 = COP timer enabled.
0 = COP timer disabled.
IRQ - Interrupt Request Pin Sensitivity
1 = IRQ pin is both negative edge and level-sensitive.
0 = IRQ pin is negative edge-sensitive only.
LVR - Low Voltage Reset Enable or Disable
1 = LVR enabled
0 = LVR disabled
STOPEN - Enable the entry into STOP mode via the execution of the STOP
instruction.
1 = STOP mode enabled
0 = STOP mode disabled. If STOP instruction is executed, a chip reset will result.
MDLCPU - Enable the MDLC BUS pin to power up the on board regulator on a rising
edge
1 = enable
0 = disable
VDDC - VDD Clamp. When this option is enabled and the on board regulator has been
disabled through software, the VDD pin will be clamped to VSS through an
active device.
1 = enable
0 = disable
-
VDDC
MDLCPU
LVR
STOPEN
IRQ
COPEN
REGEN
$3C00
0
000000
0
ERASED:
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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