Philips Semiconductors

Product specification

74F455,* 74F456

Buffers/Drivers

74F455 Octal Buffer/Driver with Parity, Inverting (3-State)

74F456 Octal Buffer/Driver with Parity, Non-Inverting (3-State)

2

1999 Jan 08

853–0371 20616

* Discontinued part. Please see the Discontinued Products List.

FEATURES

(40

µA in High and Low states)

DESCRIPTION

The 74F455 and 74F456 are octal buffers and line drivers with parity

generation/checking designed to be employed as memory address

drivers, clock drivers and bus-oriented transmitters/receivers. These

parts include parity generator/checker to improve PC board density.

TYPE

TYPICAL

PROPAGATION

DELAY

TYPICAL SUPPLY CURRENT

(TOTAL)

74F455

6.5ns

64mA

74F456

7.5ns

64mA

ORDERING INFORMATION

DESCRIPTION

COMMERCIAL

RANGE

PKG DWG #

24-pin plastic Slim

DIP (300mil)

N74456N

SOT222-1

24-pin plastic SOL

N74456D

SOT137-1

INPUT AND OUTPUT LOADING AND FAN-OUT TABLE

PINS

DESCRIPTION

74F(U.L.)

HIGH/LOW

LOAD VALUE

HIGH/LOW

D0–D7

Data inputs

2.0/0.066

40

µA/40µA

PI

Parity input

1.0/0.033

20

µA/20µA

OE0, OE1

Output Enable inputs (active Low)

1.0/0.033

20

µA/20µA

ΣE, ΣO

Parity outputs

750/106.7

15mA/64mA

Q0–Q7

Data outputs (75F455)

750/106.7

15mA/64mA

Q0–Q7

Data outputs (75F456)

750/106.7

15mA/64mA

NOTE: One (1.0) FAST Unit Load (U.L.) is defined as 20

µA in the High state and 0.6mA in the Low state.

PIN CONFIGURATION – 74F455

24

23

22

21

20

19

18

17

16

15

14

13

12

10

11

9

8

7

6

5

4

3

2

1

OE0

OE1

PI

D0

D1

D2

D3

D4

D5

D6

D7

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

ΣE

ΣO

GND

GND

SF00969

PIN CONFIGURATION – 74F456

24

23

22

21

20

19

18

17

16

15

14

13

12

10

11

9

8

7

6

5

4

3

2

1

OE0

OE1

PI

D0

D1

D2

D3

D4

D5

D6

D7

Q7

Q6

Q5

Q4

Q3

Q2

Q1

Q0

ΣE

ΣO

GND

GND

SF00958