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7ABT373APWDH Datasheet(PDF) 2 Page - NXP Semiconductors |
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7ABT373APWDH Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 11 page ![]() Philips Semiconductors Product specification 74ABT373A Octal transparent latch (3-State) 2 1995 Feb 17 853-1454 14852 FEATURES • 8-bit transparent latch • 3-State output buffers • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000 V per MIL STD 883 Method 3015 and 200 V per Machine Model • Power-up 3-State • Power-up reset • Live insertion/extraction permitted DESCRIPTION The 74ABT373A high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT373A device is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates. The data on the D inputs are transferred to the latch outputs when the Latch Enable (E) input is High. The latch remains transparent to the data inputs while E is High, and stores the data that is present one setup time before the High-to-Low enable transition. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active-Low Output Enable (OE) controls all eight 3-State buffers independent of the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay Dn to Qn CL = 50pF; VCC = 5V 3.2 3.6 ns CIN Input capacitance VI = 0V or VCC 4 pF COUT Output capacitance Outputs disabled; VO = 0V or VCC 7 pF ICCZ Total supply current Outputs disabled; VCC =5.5V 100 µA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 20-Pin Plastic DIP –40 °C to +85°C 74ABT373A N 74ABT373A N SOT146-1 20-Pin plastic SO –40 °C to +85°C 74ABT373A D 74ABT373A D SOT163-1 20-Pin Plastic SSOP Type II –40 °C to +85°C 74ABT373A DB 74ABTD373A B SOT339-1 20-Pin Plastic TSSOP Type I –40 °C to +85°C 74ABT373A PW 7ABT373APW DH SOT360-1 PIN CONFIGURATION 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OE Q0 D0 D1 Q1 Q2 D2 D3 Q3 Q4 GND D4 D5 Q5 Q6 D6 D7 Q7 VCC E SA00059 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 OE Output enable input (active-Low) 3, 4, 7, 8, 13, 14, 17, 18 D0-D7 Data inputs 2, 5, 6, 9, 12, 15, 16, 19 Q0-Q7 Data outputs 11 E Enable input (active-High) 10 GND Ground (0V) 20 VCC Positive supply voltage |
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