Pre-Production

WM8785

w

PP Rev 3.0 December 2005

11

POWER-ON RESET

The WM8785 has an internal power-on reset circuit. The reset sequence is entered at power-on or

power-up (DVDD). Until the internal reset is removed, DOUT is forced to zero. DOUT remains zero

for a count equal to 32 sample clocks, after power up. (This count is driven by MCLK and is

independent of any external LRCLK).

Figure 6 POR Circuit

Figure 7 POR Timing