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MSP430 Datasheet(PDF) 62 Page - Texas Instruments

No. de pieza MSP430
Descripción Electrónicos  AFEx8101 16-Bit and 14-Bit, Low-Power DACs With Voltage Reference and Diagnostic ADC for 4-mA to 20-mA Loop-Powered Applications
PDF  88 Pages
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Fabricante Electrónico  TI [Texas Instruments]
Página de inicio  http://www.ti.com
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MSP430 Datasheet(HTML) 62 Page - Texas Instruments

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7.6.1.16 AIN1_THRESHOLD Register (Offset = 13h) [Reset = FF00h]
Return to the Register Map.
Table 7-27. AIN1_THRESHOLD Register Field Descriptions
Bit
Field
Type
Reset
Description
15-8
Hi
R/W
FFh
High Threshold for Channel AIN1 {[11:4],4b1111}
This value is compared (>) against AIN1 data bits[11:0].
7-0
Lo
R/W
0h
Low Threshold for Channel AIN1 {[11:4],4b0000}
This value is compared (<) against AIN1 data bits[11:0].
7.6.1.17 TEMP_THRESHOLD Register (Offset = 14h) [Reset = FF00h]
Return to the Register Map.
Table 7-28. TEMP_THRESHOLD Register Field Descriptions
Bit
Field
Type
Reset
Description
15-8
Hi
R/W
FFh
High Threshold for Channel TEMP {[11:4],4b1111}
This value is compared (>) against TEMP data bits[11:0].
7-0
Lo
R/W
0h
Low Threshold for Channel TEMP {[11:4],4b0000}
This value is compared (<) against TEMP data bits[11:0].
7.6.1.18 UBM Register (Offset = 16h) [Reset = 0000h]
Return to the Register Map.
Table 7-29. UBM Register Field Descriptions
Bit
Field
Type
Reset
Description
15-1
RESERVED
R
0h
0
REG_MODE
R/W
0h
Register Mode
Configure the rest of the Register Map to be accessed by UART
break mode (UBM) or SPI. This register can only be written by the
UART Break communication.
0h = SPI Mode (default)
1h = UART Break Mode
AFE78101, AFE88101
SLASF21 – DECEMBER 2022
www.ti.com
62
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AFE78101 AFE88101



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