KTB8331

December 2021

– Revision 04b

Page 13 of 25

Kinetic Confidential

Internal Status Monitor

The KTB8331 contains a MONITOR status register (0x05), which can be read to check the present status of the

IC. The register has individual bits for the status of VOUT power-OK, VIN under-voltage lockout, VIN over-voltage

protection, VOUT positive slew, VOUT negative slew, software reset event latch, over-temperature thermal

shutdown, and buck enable. Refer to the MONITOR register description for more details.

Interrupt Register and IRQ\ Flag

The KTB8331 contains an interrupt mask register, an interrupt latch register, and an interrupt request flag pin

(IRQ\) to inform a host processor that one or more status changes have occurred. The INTMASK mask register

(0x06) and the INTLATCH interrupt register (0x07) both partially mirror the MONITOR status register bits.

However, the enable (nEN_INT) interrupt has logic inversion (in comparison to the MONITOR status register) to

indicate that the buck was disabled.

Only unmasked events are latched into the INTLATCH register. By default, all interrupts are masked and need to

be unmasked before they can be latched. The IRQ\ pin pulls active low while any bit in the INTLATCH register is

a 1. Reading the INTLATCH register resets and clears the register, thereby releasing the IRQ\ pin. However, if

an unmasked event is still on-going, it will not clear, and the IRQ\ pin will remain low.

This IRQ\ flag remain active during UVLO events as long as VIN is above VPOR=1.8V. However, the IRQ\ flag is

always cleared if VIN falls below VPOR due to power-on reset (POR) of all registers.

Input Under-Voltage Lockout (UVLO)

When the input voltage (VIN) is below the under-voltage lockout threshold (VUVLO), the buck is disabled. The I2C

registers and all logic pins remain functional during UVLO, so long as VIN remains above VPOR=1.8V. Exiting

UVLO does not reset any registers. When VIN rises above VUVLO, either at initial power up or after a temporary

VIN droop below VUVLO, and if the buck is enabled, the programmed soft-start ramp begins.

The UVLO status is reflected in the MONITOR register. UVLO events do not reset the registers to their defaults.

VIN must fall below VPOR to reset the registers.

Input Over-Voltage Protection (OVP)

When the input voltage (VIN) is above the over-voltage protection threshold (VOVP), the buck is disabled. The I2C

registers and all logic pins remain functional during OVP. When VIN returns below VOVP, and if the buck is

enabled, the programmed soft-start ramp begins.

Just like UVLO, the OVP status is reflected in the MONITOR register.

Inductor Over-Current Protection (OCP)

Inductor peak current limit (ILX_PEAK) and valley current limit (ILX_VALLEY) protect the buck and inductor during over-

current faults. The current limits

control the buck’s switching on a cycle-by-cycle basis and have a higher priority

than the voltage regulation threshold.

During sustained over-current faults, the output voltage typically droops below the regulation threshold. The

POK_STAT bit (B7) in the MONITOR register (0x05) indicates when VOUT is okay (above the VOUT_POK threshold).

Output Short-Circuit Protection (SCP) and Hiccup Mode

During a short-

circuit event at the buck’s output, the inductor experiences a very low discharge voltage during the

switching cycle

’s off-time (tOFF, when the synchronous rectifier switch is on). In this case, the inductor current

ramps down very slowly. In order to prevent inductor current runaway, the valley current limit (ILX_VALLEY) extends

tOFF, keeping the inductor current well controlled.

If an over-current fault or short-circuit event persists for more than 250µs, the buck enters hiccup mode and pause

all switching. After about 5ms, the buck attempts to soft-start. If the fault persists, the buck once again enters

hiccup mode and periodically re-attempts soft-start until the fault is removed. The low duty-factor during hiccup

mode prevents the IC from getting hot.