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RZ/A Datasheet(PDF) 45 Page - Renesas Technology Corp |
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RZ/A Datasheet(HTML) 45 Page - Renesas Technology Corp |
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45 / 83 page ![]() RZ Family / RZ/G, RZ/A Series 2. Functional Specifications R01UH0990EJ0101 Rev.1.01 Page 45 of 83 Jul 28, 2022 2.3.3 Octa Peripheral Interface Figure 2.3 shows a block diagram of the Octa Periphral interface. The OctaRAM and OctaFlash memory are controlled by the Octa Memory Controller that is with built-in to the RZ/A3UL. These memories support both single data rate (SOPI: Single Octa I/O) and double data rate (DOPI: Double Octa I/O) transfers at 100 MHz clock frequency. Figure 2.3 Block Diagram of Octa Peripheral I/F SPI_PVDD QSPI_RESET# QSPI0_SSL OM_DQS QSPI0_SPCLK QSPI0_IO0 QSPI0_IO1 QSPI0_IO2 QSPI0_IO3 OM_SIO4 OM_SIO5 OM_SIO6 OM_SIO7 RZ/A3UL OM_CS1# RZ/A3UL 1.8V 1.8V RZ/A3UL SMARC Module Board OCTAL Edition |
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