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MCP4921 Datasheet(PDF) 16 Page - Microchip Technology

No. de pieza MCP4921
Descripción Electrónicos  12-Bit DAC with SPI??Interface
PDF  40 Pages
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Fabricante Electrónico  MICROCHIP [Microchip Technology]
Página de inicio  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP4921 Datasheet(HTML) 16 Page - Microchip Technology

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MCP4921/4922
DS21897A-page 16
 2004 Microchip Technology Inc.
4.0
GENERAL OVERVIEW
The MCP492X devices are voltage output string DACs.
These devices include input amplifiers, rail-to-rail out-
put amplifiers, reference buffers, shutdown and reset-
management circuitry. Serial communication conforms
to the SPI protocol. The MCP492X operates from 2.7V
to 5.5V supplies.
The coding of these devices is straight binary and the
ideal output voltage is given by Equation 4-1, where G
is the selected gain (1x or 2x), DN represents the digital
input value and n represents the number of bits of
resolution (n = 12).
EQUATION 4-1:
LSB SIZE
1 LSB is the ideal voltage difference between two
successive codes. Table 4-1 illustrates how to calculate
LSB.
4.0.1
INL ACCURACY
INL error for these devices is the maximum deviation
between an actual code transition point and its corre-
sponding ideal transition point once offset and gain
errors have been removed. These endpoints are from
0x000 to 0xFFF. Refer to Figure 4-1.
Positive INL means transition(s) later than ideal.
Negative INL means transition(s) earlier than ideal.
FIGURE 4-1:
INL Accuracy.
4.0.2
DNL ACCURACY
DNL error is the measure of variations in code widths
from the ideal code width. A DNL error of zero would
imply that every code is exactly 1 LSB wide.
FIGURE 4-2:
DNL Accuracy.
4.0.3
OFFSET ERROR
Offset error is the deviation from zero voltage output
when the digital input code is zero.
4.0.4
GAIN ERROR
Gain error is the deviation from the ideal output,
VREF– 1 LSB, excluding the effects of offset error.
TABLE 4-1:
LSB SIZES
Device
VREF, GAIN
LSB SIZE
MCP492X
External VREF, 1x
VREF/4096
MCP492X
External VREF, 2x
2 VREF/4096
V
OUT
V
REFGDN
2
n
-------------------------
=
111
110
101
100
011
010
001
000
Digital
Input
Code
Actual
transfer
function
INL < 0
Ideal transfer
function
INL < 0
DAC Output
111
110
101
100
011
010
001
000
Digital
Input
Code
Actual
transfer
function
Ideal transfer
function
Narrow code < 1 LSB
DAC Output
Wide code, > 1 LSB



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