USB5916CSLASHKD datasheet(14/66 Pages) MICROCHIP

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2022 Microchip Technology Inc. and its subsidiaries

DS00003189C-page 14

USB5916C

Port 2

Power Enable /

Overcurrent

Sense

PRT_CTL2

I/OD12

(PU)

Port 2 Power Enable / Overcurrent Sense.

When the downstream port is enabled, this pin is set as

an input with an internal pull-up resistor applied. The

internal pull-up enables power to the downstream port

while the pin monitors for an active low overcurrent signal

assertion from an external current monitor on USB port 2.

This pin will change to an output and be driven low when

the port is disabled by configuration or by the host con-

trol.

Port 1

Power Enable /

Overcurrent

Sense

PRT_CTL1

I/OD12

(PU)

Port 1 Power Enable / Overcurrent Sense.

When the downstream port is enabled, this pin is set as

an input with an internal pull-up resistor applied. The

internal pull-up enables power to the downstream port

while the pin monitors for an active low overcurrent signal

assertion from an external current monitor on USB port 1.

This pin will change to an output and be driven low when

the port is disabled by configuration or by the host con-

trol.

Gang Power

GANG_PWR

GANG_PWR becomes the port control (PRTCTL) pin for

all downstream ports when the hub is configured for

ganged port power control mode. All port power control-

lers should be controlled from this pin when the hub is

configured for ganged port power mode.

TABLE 3-5:

SPI INTERFACE

Name

Symbol

Buffer

Type

Description

SPI Chip Enable

SPI_CE_N

I/O12

This is the active low SPI chip enable output. If the SPI

interface is enabled, this pin must be driven high in

power-down states.

SPI Clock

SPI_CLK

I/O-U

This is the SPI clock out to the serial ROM. If the SPI

interface is disabled, by setting the SPI_DIS-ABLE bit in

the UTIL_CONFIG1 register, this pin becomes

GPIO4. If

the SPI interface is enabled this pin must be driven low

during reset.

SPI Data Output

SPI_DO

I/O-U

SPI data output, when configured for SPI operation.

SPI Data Input

SPI_DI

I/O-U

SPI data input, when configured for SPI operation.

Note:

If SPI memory device is not used, these pins may not be simply floated. These pins must be handled per

their respective alternate pin functions descriptions (CFG_BC_EN and CFG_NON_REM).

TABLE 3-4:

PORT CONTROL PIN DESCRIPTIONS (CONTINUED)

Name

Symbol

Buffer

Type

Description

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