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EXAMPLE BOARD LAYOUT

0.07 MIN

ALL AROUND

0.07 MAX

ALL AROUND

16X (0.25)

16X (0.6)

(

0.2) TYP

VIA

12X (0.5)

(2.8)

(2.8)

(0.58)

TYP

(

1.66)

(R0.05)

ALL PAD CORNERS

(0.58) TYP

VQFN - 1 mm max height

RGT0016J

PLASTIC QUAD FLATPACK - NO LEAD

4224573/B 11/2018

SYMM

1

4

5

8

9

12

13

16

SYMM

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:20X

17

NOTES: (continued)

4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature

number SLUA271 (www.ti.com/lit/slua271).

5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown

on this view. It is recommended that vias under paste be filled, plugged or tented.

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

SOLDER MASK

DEFINED

EXPOSED

METAL

METAL

SOLDER MASK

OPENING

NON SOLDER MASK

SOLDER MASK DETAILS

DEFINED

(PREFERRED)

EXPOSED

METAL

INA851

SBOS999 – MARCH 2022

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24

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