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PCF8545ATTAY Datasheet(PDF) 48 Page - NXP Semiconductors |
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PCF8545ATTAY Datasheet(HTML) 48 Page - NXP Semiconductors |
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48 / 68 page ![]() NXP Semiconductors PCF8545 Universal LCD driver for multiplex rates up to 1:8 VDD (V) 1 7 5 3 013aaa501 5 10 15 fclk (kHz) 0 (1) (2) (3) 1. -40 °C. 2. 25 °C. 3. 85 °C. Figure 40. Typical clock frequency with respect to VDD and temperature 013aaa474 OSCCLK tclk(H) tclk(L) 1/fclk(ext) 0.7VDD 0.3VDD External clock source used on pin OSCCLK. Figure 41. Driver timing waveforms 013aaa475 RESET tRESET(L) 0.3VDD Figure 42. RESET timing VDD = 1.8 V to 5.5 V; VSS = 0 V; Tamb = -40 °C to +85 °C; unless otherwise specified. All timing values are valid within the operating supply voltage and temperature range and referenced to VIL and VIH with an input voltage swing of VSS to VDD. Timing waveforms see Figure 43. Symbol Parameter Conditions Min Typ Max Unit Pin SCL fSCL SCL clock frequency [1] - - 400 kHz Table 34. Timing characteristics: I2C-bus PCF8545 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 2 — 4 October 2021 48 / 68 |
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