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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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STM8AF6213 Datasheet(PDF) 80 Page - STMicroelectronics |
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STM8AF6213 Datasheet(HTML) 80 Page - STMicroelectronics |
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80 / 112 page  Electrical characteristics STM8AF6213/13A/23/23A/26 80/112 DS9884 Rev 9 Figure 33. Typical NRST pull-up resistance vs VDD @ 4 temperatures Figure 34. Typical NRST pull-up current vs VDD @ 4 temperatures The reset network shown in Figure 35 protects the device against parasitic resets. The user must ensure that the level on the NRST pin can go below VIL(NRST) max (see Table 52: NRST pin characteristics), otherwise the reset is not taken into account internally. For power consumption sensitive applications, the external reset capacitor value can be reduced to limit the charge/discharge current. If NRST signal is used to reset external circuitry, attention must be taken to the charge/discharge time of the external capacitor to fulfill the external devices reset timing conditions. Minimum recommended capacity is 100 nF. |
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