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STM32WB35CC Datasheet(PDF) 161 Page - STMicroelectronics |
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STM32WB35CC Datasheet(HTML) 161 Page - STMicroelectronics |
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161 / 193 page ![]() DS11929 Rev 11 161/193 STM32WB55xx STM32WB35xx Electrical characteristics 169 Figure 31. SPI timing diagram - slave mode and CPHA = 0 Figure 32. SPI timing diagram - slave mode and CPHA = 1 1. Measurement points are set at CMOS levels: 0.3 VDD and 0.7 VDD. (SI) MSB IN BIT1 IN LSB IN BIT6 OUT MSB OUT LSB OUT NSS input MOSI INPUT MISO OUTPUT (SI) ai14135b NSS input tSU(NSS) tc(SCK) th(NSS) CPHA=1 CPOL=0 CPHA=1 CPOL=1 tw(SCKH) tw(SCKL) ta(SO) tv(SO) th(SO) tr(SCK) tf(SCK) tdis(SO) MISO OUTPUT MOSI INPUT tsu(SI) th(SI) MSB OUT MSB IN BIT6 OUT LSB OUT LSB IN BIT 1 IN |
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