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STM32WB35CC Datasheet(PDF) 160 Page - STMicroelectronics

No. de pieza STM32WB35CC
Descripción Electrónicos  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M4 with FPU, Bluetooth® 5.2 and 802.15.4 radio solution
PDF  193 Pages
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Fabricante Electrónico  STMICROELECTRONICS [STMicroelectronics]
Página de inicio  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WB35CC Datasheet(HTML) 160 Page - STMicroelectronics

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Electrical characteristics
STM32WB55xx STM32WB35xx
160/193
DS11929 Rev 11
Table 93. SPI characteristics(1)
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
fSCK
1/tc(SCK)
SPI clock frequency
Master mode
1.65 < VDD < 3.6 V
Voltage Range 1
--
32
MHz
Master transmitter mode
1.65 < VDD < 3.6 V
Voltage Range 1
32
Slave receiver mode
1.65 < VDD < 3.6 V
Voltage Range 1
32
Slave mode transmitter/full duplex
2.7 < VDD < 3.6 V
Voltage Range 1
32(2)
Slave mode transmitter/full duplex
1.65 < VDD < 3.6 V
Voltage Range 1
20.5(2)
Voltage Range 2
8
tsu(NSS) NSS setup time
Slave mode, SPI prescaler = 2
4xTPCLK
--
-
th(NSS) NSS hold time
Slave mode, SPI prescaler = 2
2xTPCLK
--
tw(SCKH)
tw(SCKL)
SCK high and low time
Master mode
TPCLK - 1.5
TPCLK
TPCLK + 1
tsu(MI)
Data input setup time
Master mode
1.5
-
-
ns
tsu(SI)
Slave mode
1
-
-
th(MI)
Data input hold time
Master mode
5
-
-
th(SI)
Slave mode
1
-
-
ta(SO)
Data output access time
Slave mode
9-
34
tdis(SO) Data output disable time
9
-
16
tv(SO)
Data output valid time
Slave mode 2.7 < VDD < 3.6 V
Voltage Range 1
-14.5
15.5
ns
Slave mode 1.65 < VDD < 3.6 V
Voltage Range 1
-15.5
24
Slave mode 1.65 < VDD < 3.6 V
Voltage Range 2
-19.5
26
tv(MO)
Master mode (after enable edge)
-
2.5
3
th(SO)
Data output hold time
Slave mode (after enable edge)
8
-
-
th(MO)
Master mode (after enable edge)
1
-
-
1. Guaranteed by characterization results.
2. Maximum frequency in Slave transmitter mode is determined by the sum of tv(SO) and tsu(MI), which has to fit into SCK low
or high phase preceding the SCK sampling edge. This value can be achieved when the SPI communicates with a master
having tsu(MI) = 0 while Duty(SCK) = 50 %.



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