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PFD1K Datasheet(PDF) 15 Page - Microsemi Corporation |
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PFD1K Datasheet(HTML) 15 Page - Microsemi Corporation |
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15 / 19 page ![]() Turn on Sequence (continue) 7. Apply RF signals at the inputs (REFP/REFN and VCOP/VCON, 2.9 mm (f) connectors). 8. Set the dip switches VADV (part of S3, VCO) and VADR (part of S1, REF) to the disable (open) position. Adjust the VADV potentiometer to control the desired VCO divider’s output amplitude, and adjust the VADR potentiometer to control the desired REF divider’s output amplitude. The divided RF output signals can be viewed at the DRO port (REF) and at the DVO port (VCO) using a spectrum analyzer or oscilloscope. Those connectors are 2.9 mm (f). 9. Or for maximum output swing on the prescalers, set the dip switches VADV and VADR to the close position. (I.e., set the VADV and VADR voltage levels to the same voltage as VCC). Note, while in logic 1 on the dip switch of VADV and VADR, the VADV and VADR potentiometers will have no effect on the prescalers’ output swing voltage. 10. The charge pump output has a digital adjustment for the current which scales the maximum charge pump output. For example if VADJ is ON (S2 dip switch’s positon 2 is set to CLOSE/ON), and A0 to A3 (S2) are all set to ON (i.e., logic 1) then the max charge pump output will be 12mA. The A3-A0 switch of S2 settings allow the value to be adjusted as follows: Switch Settings (S2, Open = 0, Close = 1) A3 A2 A1 A0 (A3=MSB) Charge Pump Output Current 0000 0 mA 0001 0.75 mA 0010 1.5 mA ….. ….. 1111 12 mA 11. Or to control the output of the charge pump manually using the VADJ potentiometer, then set the VADJ dip switch’s (S2) - position 2 to OPEN, then uses the VADJ potentiometer to adjust the desire output current swing. 12. The POL dip switch (S2) - position 7 (see Figure 3), allows the polarity of the charge pump to be reversed. This is useful to unlock the loop momentarily. 13. The output of the charge pump can be viewed at UPP/UPN and DWP/DWN connectors (SMP plug (m)) using a spectrum analyzer or oscilloscope. 8 GHz is the maximum frequency output. See Application Notes section for additional info. 14. Optional: The divide ratio of the prescaler and the charge pump output current of the phase frequency detector can also be programmed through (J11), (a 24-pin Molex connector interface, mfg pn 87831-2420), using an external programming device, see Figure 2. If using an external programming device, set the on-board dip switches (S1: R0-R6, S2: A0-A3 and POL, and S3: V0-V6) to the open position first before making connection to the external programming device. Note: Do not use both on-board divider modulus control/charge pump control (dip switches) and the external I/O interfaces (J11) at the same time. 15 of 19 SMD-00191 Rev D Subject to Change Without Notice SMD-00191 Rev D Subject to Change Without Notice PFD1K |
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