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W7100A Datasheet(PDF) 60 Page - WIZnet Co., Ltd

No. de pieza W7100A
Descripción Electrónicos  Release with W7100 launching
PDF  160 Pages
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Fabricante Electrónico  WIZNET [WIZnet Co., Ltd]
Página de inicio  https://www.wiznet.io/ko/Product/
Logo WIZNET - WIZnet Co., Ltd

W7100A Datasheet(HTML) 60 Page - WIZnet Co., Ltd

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W7100A Datasheet v1.2.5
60
1: UART transmitter is clocked by Timer2 overflow pulses
EXEN2 - Enable T2EX pin functionality
0: Ignore T2EX events
1: Allow capture or reload as a result of T2EX pin falling edge
TR2 - Start/Stop Timer2
0: Stop
1: Start
CT2 - Timer/Counter select
0: Internally clocked timer
1: External event counter. Clock source is T2 pin
CPRL2 - Capture/Reload select
0: Automatic reload occurs when Timer2 overflow or falling edge of
the T2EX pin with EXEN2=1. When RCLK or TCLK is set, this bit
is ignored and automatic reload when Timer2 overflows.
1: On the falling edge of T2EX pin, capture is activated when EXEN
2=1.
Figure 5.14 Timer/Counter2, 16-Bit Timer/Counter with Auto-Reload
5.2.2 Interrupts
The interrupt bits for Timer2 are shown below. An interrupt can be toggled by the IE register,
and priorities can be configured by the IP register.
IE (0xA8)
7
6
5
4
3
2
1
0
Reset
EA
-
ET2
ES
ET1
EX1
ET0
EX0
0x00
Figure 5.15 Interrupt Enable Register — Timer2



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