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EDB8164B4PR-1DITF-R Datasheet(PDF) 148 Page - Micron Technology |
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EDB8164B4PR-1DITF-R Datasheet(HTML) 148 Page - Micron Technology |
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148 / 152 page ![]() Figure 87: Typical Slew Rate and tVAC – tDS for DQ Relative to Strobe V REF to AC region V REF to AC region Setup slew rate rising signal Setup slew rate falling signal TF TR V REF(DC) - VIL(AC)max TF = V IH(AC)min - VREF(DC) TR = Typical slew rate V SSQ DQS_t DQS_c V DDQ V IH(DC)min V REF(DC) V IL(AC)max V IL(DC)max V IH(AC)min Typical slew rate tVAC tVAC tDH tDS tDS tDH 216-Ball and 220-Ball, Dual-Channel LPDDR2 SDRAM Data Setup, Hold, and Slew Rate Derating 09005aef85eb530a 216b_220b_2ch_2e0e_embedded_lpddr2.pdf – Rev. F 08 /16 EN 148 Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2014 Micron Technology, Inc. All rights reserved. |
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