ADP5014ACPZ-R7 datasheet(15/34 Pages) AD

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Data Sheet

ADP5014

Rev. A | Page 15 of 34

FUNCTION CONFIGURATIONS (CFG1 AND CFG2)

The ADP5014 include CFG1 and CFG2 pins to decode the

function configurations for all channels. The CFG1 pin has a

logic status of 8 that is decoded by connecting one resistor to

ground, whereas the CFG2 pin has a logic status of 16, decoded by

connecting one resistor to ground. This decoder circuitry only

works in the initiation stage of the ADP5014; therefore, the

configurations cannot be changed in operation. Typically, the

chip initiation takes less than 1 ms before the enabled regulator

starts switching.

The CFG1 pin can be used to program the load output capability

and parallel operation for all channels. Table 6 provides the

values of the resistors needed to set different functionality in the

CFG1 pin.

Table 6. Configuration by the CFG1 Pin

RCFG1 (kΩ)

Output Capability

Channel 1

Channel 2

Channel3

Channel 4

4 A

2 A

4 A

2 A

12.1

4 A

2 A

1 A

14.7

2 A

17.8

2 A

1 A

21.5

Parallel 8A

Parallel 8 A

2 A

26.1

4 A

Parallel 4 A

31.6

Parallel 8 A

Parallel 4 A

The CFG2 pin can be used to program the operation mode

(FPWM or PWM/PSM mode), the enable mode (manual mode

or sequence mode), the timer (×1 or ×8), and GPIO

functionalities (PWRGD, SYNC-IN, CLK-OUT, UVO) for all

channels. Table 7 provides the values of the resistors needed to

set different functionality in the CFG2 pin.

The RCFG1 and RCFG2 resistors must have ±1% tolerance to ensure

the correct decoding result.

Table 7. Configuration by the CFG2 Pin

RCFG2

(kΩ)

Enable

Mode

Timer

Operation

Mode

GPIO

Manual

×1

FPWM

PWRGD

Manual

×1

FPWM

SYNC-IN

12.1

Manual

×1

FPWM

CLK-OUT

14.7

Manual

×1

PSM

PWRGD

Float

Manual

×8

FPWM

PWRGD

17.8

Manual

×8

FPWM

SYNC-IN

21.5

Manual

×8

FPWM

CLK-OUT

26.1

Manual

×8

PSM

PWRGD

31.6

Sequence

×1

FPWM

UVO

38.3

Sequence

×1

FPWM

SYNC-IN

46.4

Sequence

×1

FPWM

CLK-OUT

56.2

Sequence

×1

PSM

UVO

68.1

Sequence

×8

FPWM

UVO

82.5

Sequence

×8

FPWM

SYNC-IN

100

Sequence

×8

FPWM

CLK-OUT

121

Sequence

×8

PSM

UVO

ADP5014ACPZ-R7 Datasheet(PDF) 15 Page - Analog Devices

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