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SH7041A Datasheet(PDF) 113 Page - Renesas Technology Corp

No. de pieza SH7041A
Descripción Electrónicos  Renesas 32-Bit Single-Chip RISC Microprocessor SuperH RISC engine Family/SH7040 Series(CPU Core SH-2)
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Fabricante Electrónico  RENESAS [Renesas Technology Corp]
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SH7041A Datasheet(HTML) 113 Page - Renesas Technology Corp

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75
CPU returns to ordinary program execution state through the exception processing state after the
oscillator stabilization time has elapsed. In this mode, power consumption drops markedly, since
the oscillator stops (table 2.18).
Table 2.18
Power-Down State
State
Mode
Transition
Conditions Clock CPU
On-Chip
Peripheral
Modules
CPU
Registers
On-Chip
Cache or
On-Chip
RAM
I/O
Port
Pins
Canceling
Sleep
Execute
SLEEP
instruction
with SBY bit
cleared to 0
in SBYCR
Run
Halt
Run
Held
Held
Held
• Interrupt
• DMA address
error
• Power-on reset
• Manual reset
Stand-
by
Execute
SLEEP
instruction
with SBY bit
set to 1 in
SBYCR
Halt
Halt
Halt and
initialize*
Held
Held
Held or
Hi-Z
(select-
able)
• NMI interrupt
• Power-on reset
• Manual reset
Note: * Differs depending on the peripheral module and pin.



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