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PLL601-26SCL-R Datasheet(PDF) 3 Page - PhaseLink Corporation |
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PLL601-26SCL-R Datasheet(HTML) 3 Page - PhaseLink Corporation |
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3 / 4 page ![]() Preliminary PLL601-26 Audio Clock Generator 47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990 FAX (510) 492-0991 www.phaselink.com Rev 11/28/05 Page 3 DC SPECIFICATIONS PARAMETERS SYMBOL CONDITIONS MIN. TYP. MAX. UNITS Supply Current, Dynamic, with Loaded Outputs IDD At 27MHz, load=15pF 15 mA Operating Voltage VDD 2.25 3.63 V Output Low Voltage VOL IOL = +4mA 0.4 V Output High Voltage VOH IOH = -4mA VDD – 0.4 V Output Current IOSD VOL = 0.4V, VOH = 2.4V 10 mA Short-circuit Current IS ±50 mA CRYSTAL SPECIFICATIONS PARAMETERS SYMBOL MIN. TYP. MAX. UNITS Fundamental Crystal Resonator Frequency FXIN 27 MHz Crystal Loading Rating CL (xtal) 16 pF Maximum Sustainable Drive Level 500 µW Operating Drive Level 100 µW Crystal Shunt Capacitance C0 6 pF Effective Series Resistance, Fundamental, 27MHz ESR 30 Ω Note: A detailed crystal specification document is also available for this part JITTER SPECIFICATIONS PARAMETERS CONDITIONS FREQUENCY MIN. TYP. MAX. UNITS Cycle to Cycle Jitter Tcyc-cyc 27MHz 300 ps Cycle to Cycle Jitter Tcyc-cyc Audio Clock 150 ps |
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