BLUENRG-345VC datasheet(53/72 Pages) STMICROELECTRONICS

53 / 72 page

5.3.21

I2C interface characteristics

The I2C interface meets the timing requirements of the I2C-Bus specifications and user manual rev. 03 for:

•

Standard-mode (Sm): bit rate up to 100 kbit/s

•

Fast-mode (Fm): bit rate up to 400 kbit/s

•

Fast-mode plus (Fm+): bit rate up to 1 Mbit/s

SDA and SCL I/O requirements are met with the following restrictions: SDA and SCL I/O pins are not “true” open-

drain. When configured as open-drain, the PMOS connected between the I/O pin and VDD is disabled, but is still

present. The 20 mA output drive requirement in fast-mode plus is supported partially.

This limits the maximum load Cload supported in fast-mode plus, given by these formulas:

•

tr(SDA/SCL) = 0.8473 x Rp x Cload

•

Rp(min.) = [VDD - VOL(max)] / IOL(max)

where Rp is the I2C lines pull-up.

All I2C SDA and SCL I/Os embed an analog filter.

The characteristics below are guaranteed by design.

Table 41. I2C analog filter characteristics

Symbol

Parameter

Min.

Max.

Unit

tAF

Maximum pulse width of spikes that are suppressed by the analog filter

110

5.3.22

SPI characteristics

The parameters for SPI are derived from tests performed according to fPCLKx frequency and supply voltage

conditions.

•

Output speed is set to OSPEEDRy[1:0] = 11

•

Capacitive load C = 30 pF

•

Measurement points are done at CMOS levels: 0.5 x VDD

The characteristics below are guaranteed by design.

Table 42. SPI characteristics

Symbol

Parameter

Conditions

Min.

Typ.

Max.

Units

fSCK

SPI clock frequency

Master mode

MHz

Slave mode

32(1)

tsu(NSS)

NSS setup time

4 / fPCLK

th(NSS)

NSS hold time

2 / fPCLK

tw(SCKH)

SCK high and low time

Master mode

1 / fPCLK - 1.5

1 / fPCLK

1 / fPCLK+1

tw(SCKL)

1 / fPCLK- 1.5

1 / fPCLK

1 / fPCLK+1

tsu(MI)

Data input set-up time

Master mode

tsu(SI)

Data input set-up time

Slave mode

th(MI)

Data input hold time

Master mode

th(SI)

Data input hold time

Slave mode

ta(SO)

Data output access time

Slave mode

tdis(SO)

Data output disable time

Slave mode

tv(MO)

Data output valid time

Master mode

tv(SO)

Slave mode

BlueNRG-LP

Operating conditions

DS13282 - Rev 2

page 53/72

BLUENRG-345VC Datasheet(PDF) 53 Page - STMicroelectronics

BLUENRG-345VC Datasheet(HTML) 53 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Descarga

Enlace URL