Product Specification

LP173WF4

Liquid Crystal Display

Ver. 0.0

Oct. 15, 2013

12 / 31

3-7. Power Sequence

Power Supply

VCC

eDP

Display

HPD

from Sink

Sink

Aux CH

Source

Main Link Data

LED on/off Signal

LED_EN

Dimming signal

Of LED B/L

PWM

Power Supply

VLED

10%

90%

Table 6. POWER SEQUENCE TABLE

Black Video

Video From Source Black Video

Aux Channel Operational

Idle or off

Valid Video Data

Idle

Link

Training

T

10

T

1

T

2

T

11

T

3

T

4

T

7

T

5

T

6

T

8

T

9

T

12

Enabled

PWM

10%

90%

T

13

T

14

T

16

T

15

T

18

T

17

Note) 1. Do not insert the mating cable when system turn on.

2. Valid Data have to meet “3-3. eDP Signal Timing Specifications”

3. Video Signal, LED_EN and PWM need to be on pull-down condition on invalid status.

4. LGD recommend the rising sequence of VLED after the Vcc and valid status of Video Signal turn on.

Timing

Required

By

Limits

Units

Notes

Min

Max

T

10

Source

0

500

ms

-

T

11

Source

-

10

ms

-

T

12

Source

500

-

ms

T

13

Source

0.5

10

ms

-

T

14

Source

0.5

10

ms

-

T

15

Source

10

-

ms

-

T

16

Source

10

-

ms

-

T

17

Source

0

-

ms

-

T

18

Source

0

-

ms

-

Timing

Required

By

Limits

Units

Notes

Min

Max

T

1

Source

0.5

10

ms

-

T

2

Sink

0

200

ms

-

T

3

Sink

0

200

ms

-

T

4

Source

-

-

ms

-

T

5

Source

-

-

ms

-

T

6

Source

-

-

ms

-

T

7

Sink

0

50

ms

-

T

8

Source

-

-

ms

LGD recommend

Min 200ms

T

9

Source

-

-

ms

-