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WM8742GEDS/V Datasheet(PDF) 40 Page - Cirrus Logic

No. de pieza WM8742GEDS/V
Descripción Electrónicos  24-bit 192 kHz DAC with Advanced Digital Filtering
PDF  66 Pages
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Fabricante Electrónico  CIRRUS [Cirrus Logic]
Página de inicio  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8742GEDS/V Datasheet(HTML) 40 Page - Cirrus Logic

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WM8742
40
Rev 4.4
POWER SAVING STANDBY CONTROL
Setting the PWDN register bit immediately connects all outputs to VMID and resets the digital sections
of the DAC system including the DLL, the audio interface and the DSP. Input data samples are not
preserved, but all control register settings are maintained. When PWDN is cleared the WM8742 will
repeat its power-on initialisation sequence.
REGISTER ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R5
Format Control
05h
7
PWDN
0
Power Down Mode Select:
0 = Normal Mode
1 = Power Down Mode
Table 43 Powerdown Control
HARDWARE CONTROL MODE
When the MODE pin is held ‘low’ the WM8742 is set to hardware control mode and a limited feature
set can be configured.
PIN
NAME
DESCRIPTION
24
MODE/
LRSEL
0 = Hardware control mode
1 = 3-wire serial control mode
Z = 2-wire serial control mode
Table 44 MODE/LRSEL Hardware Control Pin Function
DSD AND PCM MODE SWITCHING
The audio interface mode can be switched between DSD Direct and PCM by controlling the state of
pin DSD. It is recommended that the chip is forced into a MUTE state before dynamically switching
modes.
PIN
NAME
DESCRIPTION
27
SCLK/DSD
0 = PCM Mode
1 = DSD Direct Mode
Table 45 SCLK/DSD Hardware Control Pin Function
AUDIO INPUT FORMAT
Under hardware control, it is possible to select between four different modes of operation for the PCM
audio interface.
PIN NUMBER
28
23
DESCRIPTION
NAME
CSB/SADDR/I2S
IWO/DOUT
STATUS
0
0
16-bit right justified
0
1
24-bit right justified
1
0
24-bit left justified
1
1
24-bit I2S
Table 46 CSB/SADDR/I2S and IWO/DOUT Hardware Control Pin Function



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