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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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Motor de Búsqueda de Datasheet de Componentes Electrónicos |
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SAMV71Q21 Datasheet(PDF) 32 Page - Microchip Technology |
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SAMV71Q21 Datasheet(HTML) 32 Page - Microchip Technology |
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32 / 41 page  19. TWI High-Speed (TWIHS) 19.1 I2C Hold Timing Incompatibility The TWIHS module is not compatible with I2C hold timing. The divider to program the hold time is too short to achieve the expected hold time at high frequency. The achieved time is 227 ns maximum at 150 MHz, instead of the required 300 ns. Workaround None. Affected Silicon Revisions A B X X 19.2 Clear Command A bus reset using the CLEAR bit of the TWIHS Control register does not work correctly during a bus busy state. Workaround Reconfigure the TWCK line in GPIO output and generate nine clock pulses through software to unlock the I2C device. Once this is done, the TWCK line can be reconfigured as a peripheral line. Affected Silicon Revisions A B X X SAM E70/S70/V70/V71 Family TWI High-Speed (TWIHS) © 2018 Microchip Technology Inc. Datasheet Errata DS80000767C-page 32 |
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