AM652X datasheet(141/277 Pages) TI1

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Note 6

SPRSP08_ELCH_03

Note 7

Note 8

(2)

VDDS1_WKUP , VDDS2_WKUP

VDDS1 ,VDDS2 , VDDS3 , VDDS4 , VDDS5 , VDDS6 ,

VDDS7 , VDDS8

VDDA_1P8_CSI0,

VDDA_PLL1_DDR,

VDDA_PLL_MPU1

VDDA_SRAM_CORE1

VDDA_SRAM_MPU1

VDDS0_WKUP ,

, VDDS0 ,

VDDA_1P8_OLDI0,

VDDA_1P8_SERDES0, VDDA_MCU, VDDA_PLL_CORE,

VDDA_PLL0_DDR,

VDDA_PLL_DSS,

VDDA_PLL_MPU0,

, VDDA_PLL_PER0,

VDDA_SRAM_CORE0,

, VDDA_SRAM_MPU0,

, VDDA_WKUP, VDDS_OSC1

(2)

VDDA_ADC_MCU, VDDA_LDO_WKUP, VDDA_POR_WKUP,

VDDA_3P3_IOLDO_WKUP,

VDDA_3P3_SDIO, VDDA_3P3_USB

VDDA_3P3_IOLDO0, VDDA_3P3_IOLDO1,

VDDS_DDR

VDD_MPU0, VDD_MPU1

WKUP_OSC0_XI, WKUP_OSC0_XO

(12)

RESETz, MCU_RESETz

RESETSTATz, MCU_RESETSTATz

WKUP_LFOSC0_XI, WKUP_LFOSC0_XO

(optional)

(3)(12)

OSC1_XI, OSC1_XO

(optional)

(9)(12)

PORz_OUT, MCU_PORz_OUT

(11)

MCU_BYP_POR

PORz, MCU_PORz

(4)

VDDSHV0_WKUP,VDDSHV1_WKUP, VDDSHV2_WKUP,

VDDSHV0, VDDSHV1, VDDSHV2, VDDSHV3, VDDSHV4,

VDDSHV5, VDDSHV6, VDDSHV7, VDDSHV8

VDD_CORE, VDD_DLL_MMC0, VDD_DLL_MMC1

VDD_MCU

VDD_WKUP0, VDD_WKUP1

Note 10

141

AM6548, AM6528, AM6546

AM6526, AM6527

www.ti.com

SPRSP08I – NOVEMBER 2017 – REVISED DECEMBER 2019

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Product Folder Links: AM6548 AM6528 AM6546 AM6526 AM6527

Specifications

Figure 5-3. Power-Up Sequencing using On Chip Power-on-reset (POR)

(1) Grey shaded areas are windows where it is valid to ramp the voltage rail.

(2) The VDDS[2:0]_WKUP, VDDS[8:0] are sourced from the same 1.8 V VDDSHV[2:0]_WKUP, VDDSHV[8:0] supply. If

VDDSHV[2:0]_WKUP, VDDSHV[8:0] is configured as 3.3 V, VDDS[2:0]_WKUP, VDDS[8:0] should be sourced from the internal IO bias

LDO.

(3) WKUP_LFOSC0 crystal clock source is enabled by default. For the oscillator start-up time, see Table 5-21, WKUP_OSC0 Switching

Characteristics – Crystal Mode. For more information about WKUP_LFOSC0 clock source configuration, refer to device TRM.

(4) PORz should be pulled to VDDSHV0. MCU_PORz should be pulled to VDDSHV0_WKUP.

(5) Blue dashed lines are not valid windows but show alternate ramp possibilities based on the associated note.

(6) If any of the VDDSHV[0-8], VDDSHV[2:0]_WKUP rails are used as 3.3 V only, then these rails must be ramped-up with the 3.3 V power

supplies.

(7) If any of the PORz, MCU_PORz signals are configured at 3.3 V only, then these signals must be ramped-up at the same time with the

3.3 V power supplies.

(8) If any of the RESETz, MCU_RESETz signals are configured at 3.3 V only, then these signals must be ramped-up at the same time with

the 3.3 V power supplies.

AM652X Datasheet(PDF) 141 Page - Texas Instruments

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