74LVC3G16GF datasheet(8/15 Pages) NEXPERIA

8 / 15 page

74LVC3G16

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 11 October 2016

8 of 15

Nexperia

74LVC3G16

Triple buffer

12. AC waveforms

Measurement points are given in Table 9.

Logic levels: VOL and VOH are typical output voltage

levels that occur with the output load.

Test data is given in Table 10.

Definitions for test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe

capacitance.

RT = Termination resistance should be equal to the

output impedance Zo of the pulse generator.

VEXT = External voltage for measuring switching times.

Fig 7.

The data input (nA) to output (nY) propagation

delays

Fig 8.

Test circuit for measuring switching times

Table 9.

Measurement points

Supply voltage

Input

Output

VCC

1.65 V to 1.95 V

0.5

 V

0.5

 V

2.3 V to 2.7 V

0.5

 V

0.5

 V

2.7V

1.5V

3.0V to 3.6V

1.5V

4.5 V to 5.5 V

0.5

 V

0.5

 V

Table 10.

Test data

Supply voltage

Input

Load

VEXT

VCC

tr =tf

tPLH, tPHL

1.65 V to 1.95 V

VCC

 2.0ns

30pF



open

2.3 V to 2.7 V

VCC

 2.0ns

30pF

500



open

2.7V

 2.5ns

50pF

500



open

3.0V to 3.6V

2.7V

 2.5ns

50pF

500



open

4.5 V to 5.5 V

VCC

 2.5ns

50pF

500



open

74LVC3G16GF Datasheet(PDF) 8 Page - Nexperia B.V. All rights reserved

74LVC3G16GF Datasheet(HTML) 8 Page - Nexperia B.V. All rights reserved

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15

Datasheet Descarga

Enlace URL