Nexperia

74LVC2G126-Q100

Bus buffer/line driver; 3-state

4. Marking

Table 2. Marking codes

Type number

Marking code [1]

74LVC2G126DP-Q100

V26

74LVC2G126DC-Q100

V26

[1] The pin 1 indicator is located on the lower left corner of the device, below the marking code.

5. Functional diagram

001aah787

2A

1A

2OE

1OE

1Y

2Y

Fig. 1. Logic symbol

mna234

nOE

nA

nY

Fig. 2. Logic diagram (one gate)

6. Pinning information

6.1. Pinning

74LVC2G126-Q100

1OE

1A

2OE

2Y

1Y

GND

2A

aaa-017813

1

2

3

4

6

5

8

7

Fig. 3. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8)

6.2. Pin description

Table 3. Pin description

Symbol

Pin

Description

1OE, 2OE

1, 7

output enable input (active HIGH)

1A, 2A

2, 5

data input

1Y, 2Y

6, 3

data output

GND

4

ground (0 V)

8

supply voltage

74LVC2G126_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 3 — 10 January 2019

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