PCF8811USLASH2DASLASH1 datasheet(24/73 Pages) PHILIPS

24 / 73 page

2004 May 17

Philips Semiconductors

Product speciﬁcation

× 128 pixels matrix LCD driver

PCF8811

Table 4

Co and D/C deﬁnition

BIT

LOGIC

LEVEL

R/W

ACTION

N/A

last control byte to be sent; only a stream of data bytes are allowed to follow; this stream

may only be terminated by a STOP or RE-START condition

another control byte will follow the data byte unless a STOP or RE-START condition is

received

D/C

data byte will be decoded and used to set-up the device

data byte will return the status byte

data byte will be stored in the display RAM

RAM read back is not supported

A read sequence is given in Fig.29 and again this

sequence follows after the Hs-mode is selected. The

PCF8811 will immediately start to output the requested

data until a not-acknowledge is transmitted by the master.

Before the read access, the user has to set the D/C bit to

the appropriate value by a preceding write access. The

write access should be terminated by a RE-START

condition so that the Hs-mode is not disabled.

After the last control byte, depending on the D/C bit

setting, either a series of display data bytes or command

data bytes may follow. If the D/C bit was set to logic 1,

these display bytes are stored in the display RAM at the

address specified by the data pointer.

The data pointer is automatically updated and the data is

directed to the intended PCF8811 device. If the D/C bit of

the last control byte was set to logic 0, these command

bytes will be decoded and the setting of the device will be

changed according to the received commands. The

acknowledgement after each byte is made only by the

addressed PCF8811. At the end of the transmission the

I2C-bus master issues a STOP condition (P) and switches

back to the F/S-mode, however, to reduce the overhead of

the master code, it is possible that a master can link

a number of Hs-mode transfers, separated by repeated

START conditions (Sr).

handbook, full pagewidth

,,,,,

F/S-mode

Hs-mode (current-source for SCLH enabled)

F/S-mode

MSC616

A/A

DATA

(n bytes

+ ack.)

R/W

MASTER CODE

SLAVE ADD.

Hs-mode continues

,,,,

Sr SLAVE ADD.

Fig.26 Data transfer format in Hs-mode.

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