LP8733 datasheet(65/82 Pages) TI1

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LP8733

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8.2.1.2 Buck Input Capacitor Selection

The input capacitors CIN_BUCK0 and CIN_BUCK1 are shown in the Typical Applications. A ceramic input bypass

capacitor of 10 μF is required for each phase of the regulator. Place the input capacitor as close as possible to

the VIN_Bx pin and PGND_Bx pin of the device. A larger value or higher voltage rating improves the input

voltage filtering. Use X7R type of capacitors, not Y5V or F. Also, the DC bias characteristics capacitors must be

considered. The minimum effective input capacitance to ensure good performance is 1.9 μF per buck input at

maximum input voltage including tolerances, ambient temperature range, and aging (assuming at least 22 μF of

additional capacitance is common for all the power input pins on the system power rail). See Table 48.

The input filter capacitor supplies current to the high-side FET switch in the first half of each cycle and reduces

voltage ripple imposed on the input power source. The low ESR of the ceramic capacitor provides the best noise

filtering of the input voltage spikes due to this rapidly changing current. Select an input filter capacitor with

sufficient ripple current rating. In addition, ferrite can be used in front of the input capacitor to reduce the EMI.

Table 48. Recommended Buck Input Capacitor (X7R Dielectric)

MANUFACTURER

PART NUMBER

VALUE

CASE SIZE

DIMENSIONS L × W × H

(mm)

VOLTAGE

RATING

Murata

GCM21BR71A106KE22

10 µF (10%)

0805

2 × 1.25 × 1.25

10 V

8.2.1.3 Buck Output Capacitor Selection

The output capacitor COUT_BUCK0 and COUT_BUCK1 are shown in Typical Applications. A ceramic local output

capacitor of 22 μF is required per phase. Use ceramic capacitors, X7R type; do not use Y5V or F. DC bias

voltage characteristics of ceramic capacitors must be considered. The output filter capacitor smooths out current

flow from the inductor to the load, which helps maintain a steady output voltage during transient load changes

and reduces output voltage ripple. These capacitors must be selected with sufficient capacitance and sufficiently

low ESR and ESL to perform these functions. The minimum effective output capacitance to ensure good

performance is 10 μF per phase, including the DC voltage rolloff, tolerances, aging, and temperature effects.

The output voltage ripple is caused by the charging and discharging of the output capacitor and due to its RESR.

The RESR is frequency dependent (and temperature dependent); ensure the value used for selection process is

at the switching frequency of the part. See Table 49.

POL capacitors CPOL_BUCKx can be used to improve load transient performance and to decrease the ripple

voltage. A higher output capacitance improves the load step behavior, reduces the output voltage ripple, and

decreases the PFM switching frequency. However, output capacitance higher than 150 μF per phase is not

necessarily of any benefit. The output capacitor may be the limiting factor in the output voltage ramp, see

Specifications for maximum output capacitance for different slew-rate settings. For large output capacitors, the

output voltage might be slower than the programmed ramp rate at voltage transitions, because of the higher

energy stored on the output capacitance. Also at start-up, the time required to charge the output capacitor to

target value might be longer. At shutdown, the output voltage is discharged to a 0.6 V level using forced-PWM

operation. This can increase the input voltage if the load current is small and the output capacitor is large

compared to input capacitor. Below the 0.6 V level, the output capacitor is discharged by the internal discharge

resistor, and with large capacitor more time is required to settle VOUT down as a consequence of the increased

time constant.

Table 49. Recommended Buck Output Capacitors (X7R Dielectric)

MANUFACTURER

PART NUMBER

VALUE

CASE SIZE

DIMENSIONS L × W × H

(mm)

VOLTAGE RATING

Murata

GCM31CR71A226KE02

22 µF (10%)

1206

3.2 × 1.6 × 1.6

10 V

8.2.1.4 LDO Input Capacitor Selection

The input capacitors CIN_LDO0 and CIN_LDO1 are shown in the Table 50. A ceramic input capacitor of 2.2 μF, 6.3 V

is sufficient for most applications. Place the input capacitor as close as possible to the VIN_LDOx pin and AGND

pin of the device. A larger value or higher voltage rating improves the input voltage filtering. Use X7R type of

capacitors, not Y5V or F. DC bias characteristics of capacitors must be considered, the minimum effective input

capacitance to ensure good performance is 0.6 μF per LDO input at maximum input voltage including tolerances,

ambient temperature range, and aging. See Table 50.

LP8733 Datasheet(PDF) 65 Page - Texas Instruments

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