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EMF09P02CS Datasheet(PDF) 1 Page - Excelliance MOS Corp. |
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EMF09P02CS Datasheet(HTML) 1 Page - Excelliance MOS Corp. |
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1 / 5 page ![]() 2016/3/11 p.1 EMF09P02CS G S D P‐Channel Logic Level Enhancement Mode Field Effect Transistor Product Summary: BVDSS ‐20V RDSON (MAX.) 9mΩ ID ‐56A Pb‐Free Lead Plating & Halogen Free ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS UNIT Gate‐Source Voltage VGS ±8 V Continuous Drain Current TC = 25 °C ID ‐56 A TC = 100 °C ‐35 Pulsed Drain Current 1 IDM ‐150 Avalanche Current IAS ‐25 Avalanche Energy L = 0.1mH, ID=‐25A, RG=25Ω EAS 62.5 mJ Repetitive Avalanche Energy 2 L = 0.05mH EAR 31.25 Power Dissipation TC = 25 °C PD 56 W TC = 100 °C 22 Operating Junction & Storage Temperature Range Tj, Tstg ‐55 to 150 °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE SYMBOL TYPICAL MAXIMUM UNIT Junction‐to‐Case RJC 2.5 °C / W Junction‐to‐Ambient 3 RJA 62.5 1Pulse width limited by maximum junction temperature. 2Duty cycle 1% |
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