MPC866P datasheet(73/92 Pages) FREESCALE

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MOTOROLA

MPC866/859 Hardware Speciﬁcations

FEC Electrical Characteristics

Table 34 shows information on the MII transmit signal timing.

Figure 75 shows the MII transmit signal timing diagram.

Figure 75. MII Transmit Signal Timing Diagram

14.3

MII Async Inputs Signal Timing (MII_CRS, MII_COL)

Table 35 shows the timing for on the MII async inputs signal.

Figure 76 shows the MII asynchronous inputs signal timing diagram.

Figure 76. MII Async Inputs Timing Diagram

Table 34. MII Transmit Signal Timing

Num

Characteristic

Min

Max

Unit

MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER

invalid

5—

MII_TX_CLK to MII_TXD[3:0], MII_TX_EN, MII_TX_ER

valid

—25

—

MII_TX_CLK pulse width high

35%

65%

MII_TX_CLK period

MII_TX_CLK pulse width low

35%

65%

MII_TX_CLK period

Table 35. MII Async Inputs Signal Timing

Num

Characteristic

Min

Max

Unit

MII_CRS, MII_COL minimum pulse width

1.5

—

MII_TX_CLK period

MII_TX_CLK (input)

MII_TXD[3:0] (outputs)

MII_TX_EN

MII_TX_ER

MII_CRS, MII_COL

Freescale Semiconductor, Inc.

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