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AD5683RARMZ Datasheet(PDF) 20 Page - Analog Devices

No. de pieza AD5683RARMZ
Descripción Electrónicos  Tiny 16-/14-/12-Bit SPI nanoDAC
PDF  28 Pages
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Fabricante Electrónico  AD [Analog Devices]
Página de inicio  http://www.analog.com
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AD5683RARMZ Datasheet(HTML) 20 Page - Analog Devices

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AD5683R/AD5682R/AD5681R/AD5683
Data Sheet
Rev. D | Page 20 of 28
Output Buffer
The output buffer is designed as an input/output rail-to-rail,
which gives a maximum output voltage range of up to VDD.
The gain bit sets the segmented string DAC gain to ×1 or ×2,
as shown in Table 12.
The output buffer voltage is determined by VREF, the gain bit,
and the offset and gain errors.
The output buffer can drive a 10 nF capacitance with a 2 kΩ
resistor in parallel, as shown in Figure 41 and Figure 44. If
a higher capacitance load is required, use the snubber method
or a shunt resistor to isolate the load from the output amplifier.
The slew rate is 0.7 V/µs with a ¼ to ¾ scale settling time of 5 µs.



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